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| MC14584B Hex Schmitt Trigger The MC14584B Hex Schmitt Trigger is constructed with MOS P-channel and N-channel enhancement mode devices in a single monolithic structure. These devices find primary use where low power dissipation and/or high noise immunity is desired. The MC14584B may be used in place of the MC14069UB hex inverter for enhanced noise immunity to "square up" slowly changing waveforms. http://onsemi.com MARKING DIAGRAMS 14 PDIP-14 P SUFFIX CASE 646 MC14584BCP AWLYYWW 1 14 SOIC-14 D SUFFIX CASE 751A 14584B AWLYWW 1 Unit V V mA 14 500 - 55 to +125 - 65 to +150 260 mW C C C SOEIAJ-14 F SUFFIX CASE 965 1 A = Assembly Location WL or L = Wafer Lot YY or Y = Year WW or W = Work Week MC14584B AWLYWW TSSOP-14 DT SUFFIX CASE 948G 1 14 14 584B ALYW * Supply Voltage Range = 3.0 Vdc to 18 Vdc * Capable of Driving Two Low-power TTL Loads or One Low-power * Double Diode Protection on All Inputs * Can Be Used to Replace MC14069UB * For Greater Hysteresis, Use MC14106B which is Pin-for-Pin Replacement for CD40106B and MM74Cl4 Schottky TTL Load over the Rated Temperature Range MAXIMUM RATINGS (Voltages Referenced to VSS) (Note 2.) Symbol VDD Vin, Vout Iin, Iout PD TA Tstg TL Parameter DC Supply Voltage Range Input or Output Voltage Range (DC or Transient) Input or Output Current (DC or Transient) per Pin Power Dissipation, per Package (Note 3.) Ambient Temperature Range Storage Temperature Range Lead Temperature (8-Second Soldering) Value - 0.5 to +18.0 - 0.5 to VDD + 0.5 10 2. Maximum Ratings are those values beyond which damage to the device may occur. 3. Temperature Derating: Plastic "P and D/DW" Packages: - 7.0 mW/_C From 65_C To 125_C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, Vin and Vout should be constrained to the range VSS (Vin or Vout) VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must be left open. ORDERING INFORMATION Device MC14584BCP MC14584BD MC14584BDR2 MC14584BDT MC14584BDTEL MC14584BF MC14584BFEL Package PDIP-14 SOIC-14 SOIC-14 TSSOP-14 Shipping 2000/Box 55/Rail 2500/Tape & Reel 96/Rail v v TSSOP-14 2000/Tape & Reel SOEIAJ-14 SOEIAJ-14 See Note 1. See Note 1. 1. For ordering information on the EIAJ version of the SOIC packages, please contact your local ON Semiconductor representative. (c) Semiconductor Components Industries, LLC, 2000 1 March, 2000 - Rev. 3 Publication Order Number: MC14584B/D MC14584B PIN ASSIGNMENT IN 1 OUT 1 IN 2 OUT 2 IN 3 OUT 3 VSS 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VDD IN 6 OUT 6 IN 5 OUT 5 IN 4 OUT 4 LOGIC DIAGRAM 1 2 3 4 5 6 9 8 11 10 13 VDD = PIN 14 VSS = PIN 7 12 EQIVALENT CIRCUIT SCHEMATIC (1/6 OF CIRCUIT SHOWN) http://onsemi.com 2 MC14584B IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII ELECTRICAL CHARACTERISTICS (Voltages Referenced to VSS) Characteristic Symbol VOL VDD Vdc 5.0 10 15 5.0 10 15 5.0 5.0 10 15 IOL 5.0 10 15 15 -- 5.0 10 15 5.0 10 15 Min -- -- -- - 55_C 25_C 125_C Max Min -- -- -- Typ (4.) 0 0 0 Max Min -- -- -- Max Unit Vdc Output Voltage Vin = VDD Vin = 0 "0" Level 0.05 0.05 0.05 -- -- -- -- -- -- -- -- -- -- 0.1 -- 0.25 0.5 1.0 0.05 0.05 0.05 -- -- -- -- -- -- -- -- -- -- 0.1 7.5 0.25 0.5 1.0 0.05 0.05 0.05 -- -- -- -- -- -- -- -- -- -- 1.0 -- 7.5 15 30 mAdc "1" Level VOH 4.95 9.95 14.95 - 3.0 - 0.64 - 1.6 - 4.2 0.64 1.6 4.2 -- -- -- -- -- 4.95 9.95 14.95 - 2.4 - 0.51 - 1.3 - 3.4 0.51 1.3 3.4 -- -- -- -- -- 5.0 10 15 - 4.2 - 0.88 - 2.25 - 8.8 0.88 2.25 8.8 0.00001 5.0 0.0005 0.0010 0.0015 4.95 9.95 14.95 - 1.7 - 0.36 - 0.9 - 2.4 0.36 0.9 2.4 -- -- -- -- -- Vdc Output Drive Current (VOH = 2.5 Vdc) (VOH = 4.6 Vdc) (VOH = 9.5 Vdc) (VOH = 13.5 Vdc) (VOL = 0.4 Vdc) (VOL = 0.5 Vdc) (VOL = 1.5 Vdc) Input Current Input Capacitance (Vin = 0) Quiescent Current (Per Package) Total Supply Current (5.) (6.) (Dynamic plus Quiescent, Per Package) (CL = 50 pF on all outputs, all buffers switching) Hysteresis Voltage IOH Source mAdc Sink Iin Cin IDD Adc pF Adc IT IT = (1.8 A/kHz) f + IDD IT = (3.6 A/kHz) f + IDD IT = (5.4 A/kHz) f + IDD Adc VH (7.) 5.0 10 15 5.0 10 15 VT- 5.0 10 15 0.27 0.36 0.77 1.9 3.4 5.2 1.6 3.0 4.5 1.0 1.3 1.7 3.5 7.0 10.6 3.3 6.7 9.7 0.25 0.3 0.6 1.8 3.3 5.2 1.6 3.0 4.6 0.6 0.7 1.1 2.7 5.3 8.0 2.1 4.6 6.9 1.0 1.2 1.5 3.4 6.9 10.5 3.2 6.7 9.8 0.21 0.25 0.50 1.7 3.2 5.2 1.5 3.0 4.7 1.0 1.2 1.4 3.4 6.9 10.5 3.2 6.7 9.9 Vdc Vdc Threshold Voltage Positive-Going VT+ Vdc Negative-Going 4. Data labelled "Typ" is not to be used for design purposes but is intended as an indication of the IC's potential performance. 5. The formulas given are for the typical characteristics only at 25_C. 6. To calculate total supply current at loads other than 50 pF: IT(CL) = IT(50 pF) + (CL - 50) Vfk where: IT is in A (per package), CL in pF, V = (VDD - VSS) in volts, f in kHz is input frequency, and k = 0.001. 7. VH = VT+ - VT- (But maximum variation of VH is specified as less than VT + max - VT - min). http://onsemi.com 3 MC14584B IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII SWITCHING CHARACTERISTICS (CL = 50 pF, TA = 25_C) Characteristic Symbol tTLH VDD Vdc 5.0 10 15 5.0 10 15 5.0 10 15 Min -- -- -- -- -- -- -- -- -- Typ (8.) 100 50 40 100 50 40 125 50 40 Max 200 100 80 200 100 80 250 100 80 Unit ns Output Rise Time Output Fall Time tTHL ns Propagation Delay Time tPLH, tPHL ns 8. Data labelled "Typ" is not to be used for design purposes but is intended as an indication of the IC's potential performance. http://onsemi.com 4 MC14584B VDD 14 PULSE GENERATOR OUTPUT INPUT 7 VSS CL 20 ns INPUT 90% 50% 10% 90% 50% 10% tf tr tPLH 20 ns VDD VSS VOH VOL tPHL OUTPUT Figure 1. Switching Time Test Circuit and Waveforms Vin VH Vin VDD VT+ VT- VSS VDD Vout VSS Vout VH Vin VDD VT+ VT- VSS VDD Vout VSS (a) Schmitt Triggers will square up inputs with slow rise and fall times. (b) A Schmitt trigger offers maximum noise immunity in gate applications. Figure 2. Typical Schmitt Trigger Applications VDD Vout , OUTPUT VOLTAGE (Vdc) 0 0 VT- VH VT+ VDD Vin, INPUT VOLTAGE (Vdc) Figure 3. Typical Transfer Characteristics http://onsemi.com 5 MC14584B PACKAGE DIMENSIONS P SUFFIX PLASTIC DIP PACKAGE CASE 646-06 ISSUE M 14 8 B 1 7 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. INCHES MIN MAX 0.715 0.770 0.240 0.260 0.145 0.185 0.015 0.021 0.040 0.070 0.100 BSC 0.052 0.095 0.008 0.015 0.115 0.135 0.290 0.310 --- 10_ 0.015 0.039 MILLIMETERS MIN MAX 18.16 18.80 6.10 6.60 3.69 4.69 0.38 0.53 1.02 1.78 2.54 BSC 1.32 2.41 0.20 0.38 2.92 3.43 7.37 7.87 --- 10_ 0.38 1.01 A F N -T- SEATING PLANE L C K H G D 14 PL 0.13 (0.005) M J M DIM A B C D F G H J K L M N D SUFFIX PLASTIC SOIC PACKAGE CASE 751A-03 ISSUE F -A- 14 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. -B- 1 7 P 7 PL 0.25 (0.010) M B M G C R X 45 _ F -T- SEATING PLANE D 14 PL 0.25 (0.010) M K TB S M A S J DIM A B C D F G J K M P R MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.228 0.244 0.010 0.019 http://onsemi.com 6 MC14584B PACKAGE DIMENSIONS DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948G-01 ISSUE O 14X K REF NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. MILLIMETERS INCHES DIM MIN MAX MIN MAX A 4.90 5.10 0.193 0.200 B 4.30 4.50 0.169 0.177 C --- 1.20 --- 0.047 D 0.05 0.15 0.002 0.006 F 0.50 0.75 0.020 0.030 G 0.65 BSC 0.026 BSC H 0.50 0.60 0.020 0.024 J 0.09 0.20 0.004 0.008 J1 0.09 0.16 0.004 0.006 K 0.19 0.30 0.007 0.012 K1 0.19 0.25 0.007 0.010 L 6.40 BSC 0.252 BSC M 0_ 8_ 0_ 8_ 0.10 (0.004) 0.15 (0.006) T U S M TU S V S N 2X L/2 14 8 0.25 (0.010) M L PIN 1 IDENT. 1 7 B -U- N F DETAIL E K K1 J J1 0.15 (0.006) T U S A -V- C 0.10 (0.004) -T- SEATING PLANE D G H DETAIL E http://onsemi.com 7 CCC EE CCC EE SECTION N-N -W- MC14584B PACKAGE DIMENSIONS F SUFFIX PLASTIC EIAJ SOIC PACKAGE CASE 965-01 ISSUE O 14 8 LE Q1 E HE M_ L DETAIL P 1 7 Z D e A VIEW P NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). DIM A A1 b c D E e HE 0.50 LE M Q1 Z MILLIMETERS MIN MAX --- 2.05 0.05 0.20 0.35 0.50 0.18 0.27 9.90 10.50 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 --- 1.42 INCHES MIN MAX --- 0.081 0.002 0.008 0.014 0.020 0.007 0.011 0.390 0.413 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 --- 0.056 c b 0.13 (0.005) M A1 0.10 (0.004) ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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